1. Field of the Invention
The present invention generally relates to the fabrication of microelectronic integrated circuits, and more specifically to the bonding of a monolithic microwave integrated circuit (MMIC) chip to a carrier using an eutectic gold/tin (Au/Sn) alloy.
2. Description of the Related Art
The eutectic chip bonding process is widely used in the fabrication of radar and other microwave systems including gallium arsenide (GaAs) microelectronic integrated circuits, especially MMIC chips. These chips have microelectronic devices formed on a frontside surface, and via holes formed therethrough from the frontside surface to a backside surface. The via holes are necessary for grounding, and reducing the source inductance and resistance of field-effect transistor (FET) devices formed on the frontside surface of the chip.
The backside surfaces of the chips are bonded to molybdenum carriers using an eutectic alloy, the most widely used of which is gold/tin. This alloy enables fusion of GaAs MMIC chips to carriers at an eutectic temperature on the order of 280.degree. C., which is much lower than the individual melting points of the constituent elements of the alloy, such that bonding can be performed at a temperature low enough to preclude damage to the chips. In addition, the eutectic gold/tin alloy has very high thermal conductivity, which is essential for providing heat dissipation from high-power GaAs MMIC chips to carriers. The basic eutectic bonding process using gold/tin alloy is described in an article entitled "Void-free Au-Sn Eutectic Bonding of GaAs Dice and its Characteristic Using Scanning Acoustic Microscopy", by G. Matijasevic et al, in Journal of Electronic Materials, Vol. 18, No. 2, part 2, March 1989, pp. 327-337.
A problem which has prevailed in eutectic gold/tin alloy bonding is migration of tin through the via holes to the frontside surfaces of the chips during the bonding operation. Tin is highly mobile, and migrates quickly to the surface of the alloy, and upwardly through the via holes, upon heating of the alloy above the eutectic temperature. Contamination of microelectronic devices on the frontside surfaces of MMIC chips by tin migration results in severe degradation of the electronic performance of the devices.
Attempts to prevent tin migration through via holes have included forming metal films or layers on the backside surfaces of chips prior to bonding. Nickel (Ni) and platinum (Pt) films have been used. The most common process includes sputtering a layer including sublayers of Ti/Pt/Au having thicknesses of 500/1,000/1,500 angstroms respectively onto the backside surfaces of the chips, followed by a plated layer including sublayers of Au/Ni/Au having thicknesses of 1.5/1.0/1.0 micrometers respectively.
Although metal films retard tin migration through the via holes, they do not block it completely, and are only effective in reducing the tin migration and resulting device contamination. In addition, the combined thickness of the sputtered and plated layers is approximately 4 micrometers. This is much too thick for chip separation using the preferred "scribe-and-break" process, which requires that the backside metal be less than approximately one micrometer thick. Chip separation must be performed using the "saw-cut" process, which is much more time consuming, expensive, and prone to breakage than the scribe-and-break process.
Refractory metal nitride layers have been used per se in the fabrication of FETs on silicon substrates. The nitride layers are formed between the aluminum contact metallizations and the sources, drains and gates of the FETs to prevent contamination thereof by aluminum from the contacts. This process is described in an article entitled "TiN Formed by Evaporation as a Diffusion Barrier Between Al and Si", by G. Ting, in Journal of Vacuum Science Technology, 21(1), May/June 1982, pp. 14-18.
Similar refractory metal nitride layers have been employed to prevent diffusion between gold contacts and GaAs substrates, such as described in an article entitled "Use of a TiN Barrier to Improve GaAs Ohmic Contact Reliability", by R. Remba et al, in IEEE Electron Device Letters, Vol. EDL-6, No. 8, Aug. 1985, pp. 437-438.
However, the problem of tin migration from the backside surfaces of substrates through via holes to the frontside surfaces during eutectic bonding of GaAs MMICs is substantially different from the problem of diffusion between contact metallizations, which are formed on the frontside surfaces, and the substrate material itself. The only materials which have been previously applied for retarding tin migration in GaAs MMICs have been nickel and platinum as described above.